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Signed-off-by: Cayetano Santos --- gnu/packages/fpga.scm | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) base-commit: 7722da6fa5422c4fec69d6c8b9536c7d6fc3d326 diff --git a/gnu/packages/fpga.scm b/gnu/packages/fpga.scm index 13ac1a0b57..74eff01a7a 100644 --- a/gnu/packages/fpga.scm +++ b/gnu/packages/fpga.scm @@ -422,6 +422,33 @@ (define-public python-myhdl a hardware description and verification language.") (license license:lgpl2.1+))) +(define-public python-cocotb + (package + (name "python-cocotb") + (version "1.8.1") + (source + (origin + (method git-fetch) + (uri (git-reference + (url "https://github.com/cocotb/cocotb") + (commit (string-append "v" version)))) + (file-name (git-file-name name version)) + (sha256 + (base32 + "07h8c3cjn4hhywvakcyk3chia102iszn6kjm53vl5f16rwy9xd07")))) + (build-system python-build-system) + (propagated-inputs (list python-find_libpython)) + (arguments + `(#:tests? #f ; no test suite + )) + (home-page "https://github.com/cocotb/cocotb") + (synopsis + "Library for writing HDL testbenches in Python") + (description + "Coroutine based cosimulation testbench environment for +verifying VHDL and Verilog RTL using Python.") + (license license:bsd-3))) + (define-public nvc (package (name "nvc")